Micro/Nano Device Reliability Laboratory
微纳器件可靠性研究室
Introduction

Micro/Nano Device Reliability Lab.(DRL) is a laboratory aiming at micro/nano-scale transistors and non-volatile memorise with three-dimensional (3D) architectures.The mian target is to extend "More Moore" teachnology with focus on the robust reliability desgin and to link “More Moore"  with“Beyond CMOS"  by defects engineering between traditonal materials and new concept materials.

微纳器件可靠性研究室(Micro/Nano Device Reliability Lab)以微纳晶体管和非挥发性半导体存储器的三维集成应用为研究导向,针对微电子和集成电路领域在后摩尔时代的关键问题,研究“More Moore”技术中高可靠性器件(例如3D NAND闪存存储器)的协同性设计,以及从“More Moore”技术跨向“Beyond CMOS”技术所必须解决的传统材料(例如硅材料)和新型材料(例如二维材料)的界面问题。研究室的具体方向包括:高可靠性闪存存储器芯片设计、硬件指纹设计、纳米器件可靠性机理、存储单元可靠性物理和新型器件材料设计。

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