Micro/Nano Device Reliability Laboratory
微纳器件可靠性研究室
1540199450(1)_gaitubao_com_.jpg

Jiezhi Chen received his Ph.D. degree in the Department of Informatics and Electronics,University of Tokyo, in 2009. Then he joined the R&D Center, Toshiba Corporation, in 2010. He is currently a professor atthe school of information science and engineering, Shandong University, China. Hisresearch interests include the characterization and process engineering of nano-scale CMOS and non-volatile memory devices, with main focus on devicereliability physics. He has published many papers in journals and conference proceedings and acted as a reviewer of several international journals. His work on nanoscale devices and device reliabilities has been the leading author or the corresponding author for more than ten times in VLSI Symposium and IEEE International Electron Device Meeting (IEDM) since 2008. He served as a CRY Technical Program Committee (TPC) member of IEDM in 2016 and 2017. Now, he serves as a TPC member in Silicon Nanoelectronics Workshop (SNW) (2018~), International conference on Solid-State and Integrated Circuit Technology (ICSICT) (2018~), IEEE International Conference on Integrated Circuits, Technologies and Applications(ICTA) (2018~), IEEE International Reliability Physics Symposium (IRPS) (2019~),and International Workshop on Dielectric Thin Films for Future Electron Devices(IWDTF) (2019~).


杰智教授,2009年博士毕业京大学子工学专业2010年加入(日本)芝研究开中心,从事米器件、存存器、以及SSD的可靠性机理研究,2016到山大学任教。目前其主要研究方向包括:米器件运特性、半体存器芯片可靠性、存储单元可靠性物理机制的、以及芯片硬件指纹设计。其主要学成果于2008-2017十余次在微顶级际权威器件研究会IEDM和VLSITechnology做告,并已得十七美国利授和日本利授IEEE-IEDM际电子器件会CRY员(2016年,2017年),IEEE-SNW硅纳电子器件会员(2018年~),IEEE-ICSICT固态和集成电路技术国际会议员(2018年~),IEEE-ICTA国际集成电路技术应用员(2018年~),IEEE-IRPS国际可靠性物理员(2019年~),和IWDTF国际电子器件薄膜介质员 (2019年~)